SettingsParallel computing
AccelerEyes
AccelerEyes builds programming tools for parallel programming and visual computing on GPU chipsets.
AccelerEyes builds programming tools for parallel programming and visual computing on GPU chipsets.
Adapteva
Adapteva is a fabless semiconductor company focusing on low power multicore microprocessor design.
Adapteva is a fabless semiconductor company focusing on low power multicore microprocessor design.
Alewife (multiprocessor)
Alewife was a cache coherent multiprocessor developed in the early 1990s by a group led by Anant Agarwal at the Massachusetts Institute of Technology.
Alewife was a cache coherent multiprocessor developed in the early 1990s by a group led by Anant Agarwal at the Massachusetts Institute of Technology.
Algorithmic skeleton
In computing, algorithmic skeletons are a high-level parallel programming model for parallel and distributed computing.
In computing, algorithmic skeletons are a high-level parallel programming model for parallel and distributed computing.
All nearest smaller values
In computer science, the all nearest smaller values problem involves computing, for each value in a sequence of numbers, the previous smaller value that has the closest position in the sequence ...
In computer science, the all nearest smaller values problem involves computing, for each value in a sequence of numbers, the previous smaller value that has the closest position in the sequence ...
Ambric
Ambric-architecture processors, are developed and marketed by a division of Nethra, a fabless semiconductor company based in Santa Clara, California.
Ambric-architecture processors, are developed and marketed by a division of Nethra, a fabless semiconductor company based in Santa Clara, California.
Amdahl's law
Amdahl's law, also known as Amdahl's argument, is named after computer architect Gene Amdahl, and is used to find the maximum expected improvement to an overall system when only part of th...
Amdahl's law, also known as Amdahl's argument, is named after computer architect Gene Amdahl, and is used to find the maximum expected improvement to an overall system when only part of th...
Amorphous computing
Amorphous computing refers to computational systems that use very large numbers of identical, parallel processors each having limited computational ability and local interactions.
Amorphous computing refers to computational systems that use very large numbers of identical, parallel processors each having limited computational ability and local interactions.
Anton (computer)
Anton is a massively parallel supercomputer designed and built by D. E. Shaw Research in New York.
Anton is a massively parallel supercomputer designed and built by D. E. Shaw Research in New York.
ASCI White
ASCI White was a supercomputer at the Cooper Livermore National Laboratory in California.
ASCI White was a supercomputer at the Cooper Livermore National Laboratory in California.
Asymmetric multiprocessing
Asymmetric Multiprocessing, or AMP, was a software stopgap for handling multiple CPUs before Symmetric Multiprocessing, or SMP was available.
Asymmetric Multiprocessing, or AMP, was a software stopgap for handling multiple CPUs before Symmetric Multiprocessing, or SMP was available.
Asynchronous array of simple processors
The asynchronous array of simple processors (AsAP) architecture comprises a 2-D array of reduced complexity programmable processors with small memories interconnected by a reconfigurable m...
The asynchronous array of simple processors (AsAP) architecture comprises a 2-D array of reduced complexity programmable processors with small memories interconnected by a reconfigurable m...
Asynchronous semaphore
Asynchronous semaphore is efficient when the asynchronous actions are independent.
Asynchronous semaphore is efficient when the asynchronous actions are independent.
Barrier (computer science)
In parallel computing, a barrier is a type of synchronization method.
In parallel computing, a barrier is a type of synchronization method.
BBN Butterfly
The BBN Butterfly was a massively parallel computer built by Bolt, Beranek and Newman in the 1980s.
The BBN Butterfly was a massively parallel computer built by Bolt, Beranek and Newman in the 1980s.
Beowulf (computing)
A Beowulf cluster is a computer cluster of what are normally identical, commercially available computers, which are running a free and open source software (FOSS), Unix-like operating system, su...
A Beowulf cluster is a computer cluster of what are normally identical, commercially available computers, which are running a free and open source software (FOSS), Unix-like operating system, su...
Beowulf cluster
A Beowulf cluster is a computer cluster of what are normally identical, commodity-grade computers networked into a small local area network with libraries and programs installed which allow proc...
A Beowulf cluster is a computer cluster of what are normally identical, commodity-grade computers networked into a small local area network with libraries and programs installed which allow proc...
Bit-level parallelism
Bit-level parallelism is a form of parallel computing based on increasing processor word size.
Bit-level parallelism is a form of parallel computing based on increasing processor word size.
Blocks (C language extension)
Blocks are a nonstandard extension added by Apple Inc. to the C, C++, and Objective-C programming languages that uses a lambda expression-like syntax to create closures within these languages.
Blocks are a nonstandard extension added by Apple Inc. to the C, C++, and Objective-C programming languages that uses a lambda expression-like syntax to create closures within these languages.
Blue Gene
Blue Gene is an IBM project aimed at designing supercomputers that can reach operating speeds in the PFLOPS range, with low power consumption.
Blue Gene is an IBM project aimed at designing supercomputers that can reach operating speeds in the PFLOPS range, with low power consumption.
BMDFM
BMDFM (Binary Modular Dataflow Machine) is software, which enables running an application in parallel on shared memory symmetric multiprocessors (SMP) using the multiple processors to speed up t...
BMDFM (Binary Modular Dataflow Machine) is software, which enables running an application in parallel on shared memory symmetric multiprocessors (SMP) using the multiple processors to speed up t...
Bulk synchronous parallel
The Bulk Synchronous Parallel abstract computer is a bridging model for designing parallel algorithms.
The Bulk Synchronous Parallel abstract computer is a bridging model for designing parallel algorithms.
C.mmp
The C.mmp was an early MIMD multiprocessor system developed at Carnegie Mellon University by William Wulf.
The C.mmp was an early MIMD multiprocessor system developed at Carnegie Mellon University by William Wulf.
Cache coherence
In computing, cache coherence refers to the consistency of data stored in local caches of a shared resource.
In computing, cache coherence refers to the consistency of data stored in local caches of a shared resource.
Cache stampede
A cache stampede is a type of cascading failure that can occur when massively parallel computing systems with caching mechanisms come under very high load.
A cache stampede is a type of cascading failure that can occur when massively parallel computing systems with caching mechanisms come under very high load.
Cache-only memory architecture
Cache only memory architecture is a computer memory organization for use in multiprocessors in which the local memories at each node are used as cache.
Cache only memory architecture is a computer memory organization for use in multiprocessors in which the local memories at each node are used as cache.
Calculus of Broadcasting Systems
Calculus of Broadcasting Systems is a CCS-like calculus where processes speak one at a time and each is heard instantaneously by all others.
Calculus of Broadcasting Systems is a CCS-like calculus where processes speak one at a time and each is heard instantaneously by all others.
Caltech Cosmic Cube
The Caltech Cosmic Cube was a parallel computer, developed by Charles Seitz and Geoffrey Fox from 1981 onward.
The Caltech Cosmic Cube was a parallel computer, developed by Charles Seitz and Geoffrey Fox from 1981 onward.
Calxeda
Calxeda (previously known as Smooth-Stone) is a start-up company that aims to provide ARM-based computers for the server market.
Calxeda (previously known as Smooth-Stone) is a start-up company that aims to provide ARM-based computers for the server market.
Cellular architecture
A cellular architecture is a type of computer architecture prominent in parallel computing.
A cellular architecture is a type of computer architecture prominent in parallel computing.
Cellular multiprocessing
Cellular multiprocessing is a multiprocessing architecture designed initially for Intel central processing units from Unisys, a worldwide information technology consulting services and solutions...
Cellular multiprocessing is a multiprocessing architecture designed initially for Intel central processing units from Unisys, a worldwide information technology consulting services and solutions...
Cluster manager
A Cluster manager usually is a backend GUI or command-line software that runs on one or all cluster nodes (in some cases it runs on a different server or cluster of management servers.) The clus...
A Cluster manager usually is a backend GUI or command-line software that runs on one or all cluster nodes (in some cases it runs on a different server or cluster of management servers.) The clus...
Cluster-aware application
A cluster-aware application is a software application designed to call cluster APIs in order to determine its running state, in case a manual failover is triggered between cluster nodes for plan...
A cluster-aware application is a software application designed to call cluster APIs in order to determine its running state, in case a manual failover is triggered between cluster nodes for plan...
Computational Research Laboratories
A member of the prestigious TATA Group, Computational Research Laboratories is a wholly owned subsidiary of TATA Sons Limited.
A member of the prestigious TATA Group, Computational Research Laboratories is a wholly owned subsidiary of TATA Sons Limited.
Computer cluster
A computer cluster consists of a set of loosely connected computers that work together so that in many respects they can be viewed as a single system.
A computer cluster consists of a set of loosely connected computers that work together so that in many respects they can be viewed as a single system.
Condor High-Throughput Computing System
Condor is an open source high-throughput computing software framework for coarse-grained distributed parallelization of computationally intensive tasks.
Condor is an open source high-throughput computing software framework for coarse-grained distributed parallelization of computationally intensive tasks.
Connection Machine
The Connection Machine was a series of supercomputers that grew out of Danny Hillis' research in the early 1980s at MIT on alternatives to the traditional von Neumann architecture of computation.
The Connection Machine was a series of supercomputers that grew out of Danny Hillis' research in the early 1980s at MIT on alternatives to the traditional von Neumann architecture of computation.
Content Addressable Parallel Processor
A Content Addressable Parallel Processor (CAPP) is a type of parallel processor which uses content-addressing memory (CAM) principles.
A Content Addressable Parallel Processor (CAPP) is a type of parallel processor which uses content-addressing memory (CAM) principles.
Coscheduling
Coscheduling is a mechanism proposed for concurrent systems that schedules related processes to run on different processors at the same time.
Coscheduling is a mechanism proposed for concurrent systems that schedules related processes to run on different processors at the same time.
Cost efficiency
Cost efficiency (or cost optimality), in the context of parallel computer algorithms, refers to a measure of how effectively parallel computing can be used to solve a particular problem.
Cost efficiency (or cost optimality), in the context of parallel computer algorithms, refers to a measure of how effectively parallel computing can be used to solve a particular problem.
DAP FORTRAN
DAP FORTRAN was an extension of the non IO parts of FORTRAN with constructs that supported parallel computing for the ICL Distributed Array Processor (DAP).
DAP FORTRAN was an extension of the non IO parts of FORTRAN with constructs that supported parallel computing for the ICL Distributed Array Processor (DAP).
Data parallelism
Data parallelism (also known as loop-level parallelism) is a form of parallelization of computing across multiple processors in parallel computing environments.
Data parallelism (also known as loop-level parallelism) is a form of parallelization of computing across multiple processors in parallel computing environments.
Data-centric programming language
Data-centric programming language Data-Centric Programming Language defines a category of programming languages where the primary function is the management and manipulation of data.
Data-centric programming language Data-Centric Programming Language defines a category of programming languages where the primary function is the management and manipulation of data.
Deep Blue (chess computer)
Deep Blue was a chess-playing computer developed by IBM. On May 11, 1997, the machine won a six-game match by two wins to one with three draws against world champion Garry Kasparov.
Deep Blue was a chess-playing computer developed by IBM. On May 11, 1997, the machine won a six-game match by two wins to one with three draws against world champion Garry Kasparov.
Diskless Shared Root Cluster
A Diskless Shared-root Cluster is a way to manage several machines at the same time.
A Diskless Shared-root Cluster is a way to manage several machines at the same time.
Diskless shared-root cluster
A diskless shared-root cluster is a way to manage several machines at the same time.
A diskless shared-root cluster is a way to manage several machines at the same time.
Distributed memory
In computer science, distributed memory refers to a multiple-processor computer system in which each processor has its own private memory.
In computer science, distributed memory refers to a multiple-processor computer system in which each processor has its own private memory.
Ease (programming language)
Ease is a general purpose parallel programming language, designed by Steven Ericsson-Zenith of Yale University.
Ease is a general purpose parallel programming language, designed by Steven Ericsson-Zenith of Yale University.
Embarrassingly parallel
In parallel computing, an embarrassingly parallel workload (or embarrassingly parallel problem) is one for which little or no effort is required to separate the problem into a number of par...
In parallel computing, an embarrassingly parallel workload (or embarrassingly parallel problem) is one for which little or no effort is required to separate the problem into a number of par...
Encore Computer
Encore Computer was an early pioneer in the parallel computing market, based in Marlborough, Massachusetts.
Encore Computer was an early pioneer in the parallel computing market, based in Marlborough, Massachusetts.
Euler tour technique
The Euler tour technique (ETT), named after Leonhard Euler, is a method in graph theory for representing trees.
The Euler tour technique (ETT), named after Leonhard Euler, is a method in graph theory for representing trees.
EXPEED
The Nikon EXPEED image processing engines are signal processors for Nikon's digital cameras.
The Nikon EXPEED image processing engines are signal processors for Nikon's digital cameras.
Expeed
The Nikon Expeed image processing engines are signal processors for Nikon's digital cameras.
The Nikon Expeed image processing engines are signal processors for Nikon's digital cameras.
Explicit multi-threading
Explicit Multi-Threading ( XMT ) is a computer science paradigm for building and programming parallel computers designed around the Parallel Random Access Machine (PRAM) parallel computa...
Explicit Multi-Threading ( XMT ) is a computer science paradigm for building and programming parallel computers designed around the Parallel Random Access Machine (PRAM) parallel computa...
Fifth generation computer
The Fifth Generation Computer Systems project was an initiative by Japan's Ministry of International Trade and Industry, begun in 1982, to create a "fifth generation computer" which was supposed...
The Fifth Generation Computer Systems project was an initiative by Japan's Ministry of International Trade and Industry, begun in 1982, to create a "fifth generation computer" which was supposed...
Finite element machine
The Finite Element Machine was a late 1970s-early 1980s NASA project to build and evaluate the performance of a parallel computer for structural analysis.
The Finite Element Machine was a late 1970s-early 1980s NASA project to build and evaluate the performance of a parallel computer for structural analysis.
Fixstars Solutions
Fixstars Solutions, Inc is a software and services company specializing in Multi-core processor, particularly in the Nvidia's GPU and CUDA environment, IBM Power7 and Cell.
Fixstars Solutions, Inc is a software and services company specializing in Multi-core processor, particularly in the Nvidia's GPU and CUDA environment, IBM Power7 and Cell.
Flexible Architecture for Simulation and Testing
The FAST Project is a new hybrid hardware prototyping platform enabled by integrating a variety of hardware components on a printed circuit board (PCB) to implement Chip Multiprocessor (CMP) or ...
The FAST Project is a new hybrid hardware prototyping platform enabled by integrating a variety of hardware components on a printed circuit board (PCB) to implement Chip Multiprocessor (CMP) or ...
Flow-based programming
In computer science, flow-based programming (FBP) is a programming paradigm that defines applications as networks of "black box" processes, which exchange data across predefined connection...
In computer science, flow-based programming (FBP) is a programming paradigm that defines applications as networks of "black box" processes, which exchange data across predefined connection...
Fortran
Fortran is a general-purpose, procedural, imperative programming language that is especially suited to numeric computation and scientific computing.
Fortran is a general-purpose, procedural, imperative programming language that is especially suited to numeric computation and scientific computing.
FPS AP-120B
The FPS AP-120B was a 38-bit, pipeline-oriented array processor manufactured by Floating Point Systems.
The FPS AP-120B was a 38-bit, pipeline-oriented array processor manufactured by Floating Point Systems.
FR-V
The Fujitsu FR-V is a 1-8 way VLIW 32-bit RISC multi-core processor family presented in 1999.
The Fujitsu FR-V is a 1-8 way VLIW 32-bit RISC multi-core processor family presented in 1999.
Ganglia (software)
Ganglia is a scalable distributed system monitor tool for high-performance computing systems such as clusters and grids.
Ganglia is a scalable distributed system monitor tool for high-performance computing systems such as clusters and grids.
Gather-scatter (vector addressing)
Gather-scatter is a type of memory addressing that often arises when addressing vectors in sparse linear algebra operations.
Gather-scatter is a type of memory addressing that often arises when addressing vectors in sparse linear algebra operations.
Geometric-Arithmetic Parallel Processor
The GAPP (Geometric-Arithmetic Parallel Processor), invented by Polish mathematician Włodzimierz Holsztyński in 1981, was patented by Martin Marietta and is now owned by Silicon Optix, Inc. In t...
The GAPP (Geometric-Arithmetic Parallel Processor), invented by Polish mathematician Włodzimierz Holsztyński in 1981, was patented by Martin Marietta and is now owned by Silicon Optix, Inc. In t...
Global Arrays
Global Arrays, or GA, is the library developed by scientists at Pacific Northwest National Laboratory for parallel computing.
Global Arrays, or GA, is the library developed by scientists at Pacific Northwest National Laboratory for parallel computing.
Goodyear MPP
The Goodyear Massively Parallel Processor (MPP) was a massively parallel processing supercomputer built by Goodyear Aerospace for the NASA Goddard Space Flight Center.
The Goodyear Massively Parallel Processor (MPP) was a massively parallel processing supercomputer built by Goodyear Aerospace for the NASA Goddard Space Flight Center.
Google File System
Google File System (GFS or GoogleFS) is a proprietary distributed file system developed by Google Inc. for its own use.
Google File System (GFS or GoogleFS) is a proprietary distributed file system developed by Google Inc. for its own use.
GPGPU
General-purpose computing on graphics processing units (GPGPU, GPGP or less often GP²U) is the means of using a graphics processing unit (GPU), which typically handles computat...
General-purpose computing on graphics processing units (GPGPU, GPGP or less often GP²U) is the means of using a graphics processing unit (GPU), which typically handles computat...
Grand Central Dispatch
Grand Central Dispatch (GCD) is a technology developed by Apple Inc. to optimize application support for systems with multi-core processors and other symmetric multiprocessing systems.
Grand Central Dispatch (GCD) is a technology developed by Apple Inc. to optimize application support for systems with multi-core processors and other symmetric multiprocessing systems.
Grid MP
Grid MP is a commercial distributed computing software package developed and sold by Univa (formerly known as United Devices), a privately held company based primarily in Austin, Texas.
Grid MP is a commercial distributed computing software package developed and sold by Univa (formerly known as United Devices), a privately held company based primarily in Austin, Texas.
gridMathematica
gridMathematica is a software product sold by Wolfram Research which extends the parallel processing capabilities of its main product Mathematica.
gridMathematica is a software product sold by Wolfram Research which extends the parallel processing capabilities of its main product Mathematica.
Gustafson's law
Gustafson's Law is a law in computer science which says that computations involving arbitrarily large data sets can be efficiently parallelized.
Gustafson's Law is a law in computer science which says that computations involving arbitrarily large data sets can be efficiently parallelized.
Heterogeneous Element Processor
The Heterogeneous Element Processor (HEP) was introduced by Denelcor, Inc. in 1982 as the world's first commercial MIMD computer.
The Heterogeneous Element Processor (HEP) was introduced by Denelcor, Inc. in 1982 as the world's first commercial MIMD computer.
High Performance Fortran
High Performance Fortran (HPF) is an extension of Fortran 90 with constructs that support parallel computing, published by the High Performance Fortran Forum (HPFF).
High Performance Fortran (HPF) is an extension of Fortran 90 with constructs that support parallel computing, published by the High Performance Fortran Forum (HPFF).
High Productivity Computing Systems
High Productivity Computing Systems (HPCS) is a DARPA project for developing a new generation of economically viable high productivity computing systems for national security and industry in the...
High Productivity Computing Systems (HPCS) is a DARPA project for developing a new generation of economically viable high productivity computing systems for national security and industry in the...
High-performance computing
High-performance computing (HPC) uses supercomputers and computer clusters to solve advanced computation problems.
High-performance computing (HPC) uses supercomputers and computer clusters to solve advanced computation problems.
High-performance technical computing
High Performance Technical Computing (HPTC) refers to the application of high performance computing (HPC) to technical, as opposed to business or scientific, problems (although the lines betwee...
High Performance Technical Computing (HPTC) refers to the application of high performance computing (HPC) to technical, as opposed to business or scientific, problems (although the lines betwee...
High-throughput computing
High-throughput computing (HTC) is a computer science term to describe the use of many computing resources over long periods of time to accomplish a computational task.
High-throughput computing (HTC) is a computer science term to describe the use of many computing resources over long periods of time to accomplish a computational task.
History of computer clusters
The history of computer clusters is best captured by a footnote in Greg Pfister's In Search of Clusters: “Virtually every press release from DEC mentioning clusters says ‘DEC, who invented c...
The history of computer clusters is best captured by a footnote in Greg Pfister's In Search of Clusters: “Virtually every press release from DEC mentioning clusters says ‘DEC, who invented c...
HMPP Open Standard
Based on a set of directives, HMPP Open Standard is a programming model designed to handle hardware accelerators without the complexity associated with GPU programming.
Based on a set of directives, HMPP Open Standard is a programming model designed to handle hardware accelerators without the complexity associated with GPU programming.
HPCC
HPCC (High-Performance Computing Cluster), also known as DAS (Data Analytics Supercomputer), is a Data Intensive Computing system platform developed by LexisNexis Risk Solutions.
HPCC (High-Performance Computing Cluster), also known as DAS (Data Analytics Supercomputer), is a Data Intensive Computing system platform developed by LexisNexis Risk Solutions.
IBM Kittyhawk
Kittyhawk is a new theoretical IBM supercomputer.
Kittyhawk is a new theoretical IBM supercomputer.
IBM Parallel Sysplex
In computing, a Parallel Sysplex is a cluster of IBM mainframes acting together as a single system image with z/OS. Used for disaster recovery, Parallel Sysplex combines data sharing and parall...
In computing, a Parallel Sysplex is a cluster of IBM mainframes acting together as a single system image with z/OS. Used for disaster recovery, Parallel Sysplex combines data sharing and parall...
IBM Scalable POWERparallel
Scalable POWERparallel or SP is an IBM supercomputer platform.
Scalable POWERparallel or SP is an IBM supercomputer platform.
ICL Distributed Array Processor
The Distributed Array Processor (DAP) produced by International Computers Limited (ICL) was the world's first commercial massively parallel computer.
The Distributed Array Processor (DAP) produced by International Computers Limited (ICL) was the world's first commercial massively parallel computer.
ILLIAC III
The ILLIAC III was a fine-grained SIMD pattern recognition computer built by the University of Illinois in 1966.
The ILLIAC III was a fine-grained SIMD pattern recognition computer built by the University of Illinois in 1966.
Implicit parallelism
In computer science, implicit parallelism is a characteristic of a programming language that allows a compiler or interpreter to automatically exploit the parallelism inherent to the computati...
In computer science, implicit parallelism is a characteristic of a programming language that allows a compiler or interpreter to automatically exploit the parallelism inherent to the computati...
Industrial Real-Time Fortran
Industrial Real-Time Fortran (IRTF) was developed, during the decade of 1970-1980, to augment the Fortran language with library bindings useful for process and device control, and I/O. Al...
Industrial Real-Time Fortran (IRTF) was developed, during the decade of 1970-1980, to augment the Fortran language with library bindings useful for process and device control, and I/O. Al...
Inmos
Inmos Limited (trademark INMOS) was a British semiconductor company, founded by Iann Barron, based in Bristol and incorporated in November 1978.
Inmos Limited (trademark INMOS) was a British semiconductor company, founded by Iann Barron, based in Bristol and incorporated in November 1978.
Instruction window
An instruction window in the field of superscalar CPU architecture is a group of instructions actively processed in parallel.
An instruction window in the field of superscalar CPU architecture is a group of instructions actively processed in parallel.
Intel Array Building Blocks
Intel Array Building Blocks is a C++ library developed by Intel Corporation for exploiting data parallel portions of programs to take advantage of multi-core processors, graphics processing unit...
Intel Array Building Blocks is a C++ library developed by Intel Corporation for exploiting data parallel portions of programs to take advantage of multi-core processors, graphics processing unit...
Intel Cilk Plus
Cilk Plus is a general-purpose programming language designed for multithreaded parallel computing.
Cilk Plus is a general-purpose programming language designed for multithreaded parallel computing.
Intel Concurrent Collections
Intel Concurrent Collections (known as CnC) is a programming language and software framework developed by Intel to express parallelism in applications.
Intel Concurrent Collections (known as CnC) is a programming language and software framework developed by Intel to express parallelism in applications.
Intel Ct
Intel Ct is a programming model developed by Intel to ease the exploitation of its future multicore chips, as demonstrated by the Tera-Scale research program.
Intel Ct is a programming model developed by Intel to ease the exploitation of its future multicore chips, as demonstrated by the Tera-Scale research program.
Intel iPSC
The Intel iPSC is a parallel computer.
The Intel iPSC is a parallel computer.
Intel iPSC/2
The Intel iPSC/2 is a parallel processor computer produced in 1987.
The Intel iPSC/2 is a parallel processor computer produced in 1987.
Intel iPSC/860
The Intel iPSC/860 was a massively parallel supercomputer launched by Intel in 1990.
The Intel iPSC/860 was a massively parallel supercomputer launched by Intel in 1990.
Intel MIC
Intel Many Integrated Core Architecture or Intel MIC (pronouced Mike) is a multiprocessor computer architecture developed by Intel incorporating earlier work on the Larrabee many core ...
Intel Many Integrated Core Architecture or Intel MIC (pronouced Mike) is a multiprocessor computer architecture developed by Intel incorporating earlier work on the Larrabee many core ...
Intel Parallel Building Blocks
Intel Parallel Building Blocks (PBB) is a collection of three programming solutions designed for multithreaded parallel computing.
Intel Parallel Building Blocks (PBB) is a collection of three programming solutions designed for multithreaded parallel computing.
Intel Parallel Studio
Intel Parallel Studio is a software development product developed by Intel that plugs into the Microsoft Visual Studio Integrated Development Environment.
Intel Parallel Studio is a software development product developed by Intel that plugs into the Microsoft Visual Studio Integrated Development Environment.
Intel Threading Building Blocks
Intel Threading Building Blocks (also known as TBB) is a C++ template library developed by Intel Corporation for writing software programs that take advantage of multi-core processors.
Intel Threading Building Blocks (also known as TBB) is a C++ template library developed by Intel Corporation for writing software programs that take advantage of multi-core processors.
IP Virtual Server
IPVS (IP Virtual Server) implements transport-layer load balancing inside the Linux kernel, so called Layer-4 LAN switching.
IPVS (IP Virtual Server) implements transport-layer load balancing inside the Linux kernel, so called Layer-4 LAN switching.
IPFlex
IPFlex (アイピーフレックス) is a fabless semiconductor company based in Tokyo, Japan.
IPFlex (アイピーフレックス) is a fabless semiconductor company based in Tokyo, Japan.
iWarp
iWarp was an experimental parallel supercomputer architecture developed as a joint project by Intel and Carnegie Mellon University.
iWarp was an experimental parallel supercomputer architecture developed as a joint project by Intel and Carnegie Mellon University.
Jacket (software)
Jacket is a numerical computing platform enabling GPU acceleration of MATLAB-based codes.
Jacket is a numerical computing platform enabling GPU acceleration of MATLAB-based codes.
Jazz DSP
The Jazz DSP, by Improv Systems, is a VLIW embedded digital siginal processor architecture with a 2-stage instruction pipeline, and single-cycle execution units.
The Jazz DSP, by Improv Systems, is a VLIW embedded digital siginal processor architecture with a 2-stage instruction pipeline, and single-cycle execution units.
Joyce (programming language)
Joyce is a secure, concurrent programming language designed by Per Brinch Hansen in the 1980s.
Joyce is a secure, concurrent programming language designed by Per Brinch Hansen in the 1980s.
Karp-Flatt metric
The Karp–Flatt Metric is a measure of parallelization of code in parallel processor systems.
The Karp–Flatt Metric is a measure of parallelization of code in parallel processor systems.
Karp–Flatt metric
The Karp–Flatt Metric is a measure of parallelization of code in parallel processor systems.
The Karp–Flatt Metric is a measure of parallelization of code in parallel processor systems.
Linda (coordination language)
In computer science, Linda is a model of coordination and communication among several parallel processes operating upon objects stored in and retrieved from shared, virtual, associative memory.
In computer science, Linda is a model of coordination and communication among several parallel processes operating upon objects stored in and retrieved from shared, virtual, associative memory.
Linda-like systems
Linda-like systems are parallel and distributed programming models that use unstructured collections of tuples as a communication mechanism between different processes.
Linda-like systems are parallel and distributed programming models that use unstructured collections of tuples as a communication mechanism between different processes.
Linux Virtual Server
Linux Virtual Server (LVS) is an advanced load balancing solution for Linux systems.
Linux Virtual Server (LVS) is an advanced load balancing solution for Linux systems.
Linux-HA
The Linux-HA (High-Availability Linux) project provides a high-availability (clustering) solution for Linux, FreeBSD, OpenBSD, Solaris and Mac OS X which promotes reliability, availability, and ...
The Linux-HA (High-Availability Linux) project provides a high-availability (clustering) solution for Linux, FreeBSD, OpenBSD, Solaris and Mac OS X which promotes reliability, availability, and ...
LinuxPMI
LinuxPMI (Linux Process Migration Infrastructure) is a Linux Kernel extension for multi-system-image (in contrast to a single-system image) clustering.
LinuxPMI (Linux Process Migration Infrastructure) is a Linux Kernel extension for multi-system-image (in contrast to a single-system image) clustering.
List ranking
In parallel algorithms, the list ranking problem involves determining the position, or rank, of each item in a linked list.
In parallel algorithms, the list ranking problem involves determining the position, or rank, of each item in a linked list.
Livermore loops
Livermore loops (also known as the Livermore Fortran kernels or LFK) is a benchmark for parallel computers.
Livermore loops (also known as the Livermore Fortran kernels or LFK) is a benchmark for parallel computers.
Locale (computer hardware)
In computer architecture a locale is an abstraction of the concept of a localized set of hardware resources which are close enough to enjoy uniform memory access.
In computer architecture a locale is an abstraction of the concept of a localized set of hardware resources which are close enough to enjoy uniform memory access.
LogP machine
The LogP machine is a model for parallel computation.
The LogP machine is a model for parallel computation.
Loop scheduling
In parallel computing, loop scheduling is the problem of assigning proper iterations of parallelizable loops among n processors to achieve load balancing and maintain data locality with mini...
In parallel computing, loop scheduling is the problem of assigning proper iterations of parallelizable loops among n processors to achieve load balancing and maintain data locality with mini...
Loop unwinding
Loop unwinding, also known as loop unrolling, is a loop transformation technique that attempts to optimize a program's execution speed at the expense of its binary size.
Loop unwinding, also known as loop unrolling, is a loop transformation technique that attempts to optimize a program's execution speed at the expense of its binary size.
MADNESS
MADNESS (Multiresolution Adaptive Numerical Environment for Scientific Simulation) is a high-level environment for the solution of integral and differential equations in many dimensions u...
MADNESS (Multiresolution Adaptive Numerical Environment for Scientific Simulation) is a high-level environment for the solution of integral and differential equations in many dimensions u...
Many-task computing
Many-task computing (MTC) aims to bridge the gap between two computing paradigms, high throughput computing (HTC) and high-performance computing (HPC).
Many-task computing (MTC) aims to bridge the gap between two computing paradigms, high throughput computing (HTC) and high-performance computing (HPC).
MapReduce
MapReduce is the name of several software frameworks.
MapReduce is the name of several software frameworks.
Massively parallel
Massively parallel is a description that appears in computer science, life sciences, medical diagnostics, and other fields.
Massively parallel is a description that appears in computer science, life sciences, medical diagnostics, and other fields.
Massively parallel (computing)
In computing massively parallel refers to the use of a large number of processors to perform a set of coordinated computations in parallel.
In computing massively parallel refers to the use of a large number of processors to perform a set of coordinated computations in parallel.
Massively parallel processor array
A Massively Parallel Processor Array (MPPA) is a type of integrated circuit which has a massively parallel array of hundreds or thousands of CPUs and RAM memories.
A Massively Parallel Processor Array (MPPA) is a type of integrated circuit which has a massively parallel array of hundreds or thousands of CPUs and RAM memories.
Master-checker
A master-checker is a hardware-supported fault tolerance method for multiprocessor systems, in which two processors, referred to as the master and checker, calculate the same functions i...
A master-checker is a hardware-supported fault tolerance method for multiprocessor systems, in which two processors, referred to as the master and checker, calculate the same functions i...
MDMX
The MDMX (MIPS Digital Media eXtension), also known as MaDMaX, is an extension to the MIPS instruction set architecture (ISA) released in October 1996 at the Microprocessor Forum.
The MDMX (MIPS Digital Media eXtension), also known as MaDMaX, is an extension to the MIPS instruction set architecture (ISA) released in October 1996 at the Microprocessor Forum.
Meiko Scientific
Meiko Scientific Ltd. was a British supercomputer company based in Bristol, founded by members of the design team working on the INMOS transputer microprocessor.
Meiko Scientific Ltd. was a British supercomputer company based in Bristol, founded by members of the design team working on the INMOS transputer microprocessor.
Memory coherence
Memory coherence is an issue that affects the design of computer systems in which two or more processors or cores share a common area of memory.
Memory coherence is an issue that affects the design of computer systems in which two or more processors or cores share a common area of memory.
Message Passing Interface
Message Passing Interface is a standardized and portable message-passing system designed by a group of researchers from academia and industry to function on a wide variety of parallel computers.
Message Passing Interface is a standardized and portable message-passing system designed by a group of researchers from academia and industry to function on a wide variety of parallel computers.
Micro-Threads (multi core)
Micro-Threads for multi-core and many-cores processors is a mechanism to hide memory latency similar to multi-threading architectures.
Micro-Threads for multi-core and many-cores processors is a mechanism to hide memory latency similar to multi-threading architectures.
Microsoft Cluster Server
Microsoft Cluster Server is software designed to allow servers to work together as a computer cluster, to provide failover and increased availability of applications, or parallel calculating pow...
Microsoft Cluster Server is software designed to allow servers to work together as a computer cluster, to provide failover and increased availability of applications, or parallel calculating pow...
MIMD
In computing, MIMD (Multiple Instruction stream, Multiple Data stream) is a technique employed to achieve parallelism.
In computing, MIMD (Multiple Instruction stream, Multiple Data stream) is a technique employed to achieve parallelism.
MISD
In computing, MISD (multiple instruction, single data) is a type of parallel computing architecture where many functional units perform different operations on the same data.
In computing, MISD (multiple instruction, single data) is a type of parallel computing architecture where many functional units perform different operations on the same data.
MPICH
MPICH is a freely available, portable implementation of MPI, a standard for message-passing for distributed-memory applications used in parallel computing.
MPICH is a freely available, portable implementation of MPI, a standard for message-passing for distributed-memory applications used in parallel computing.
Multi-core processor
A multi-core processor is a single computing component with two or more independent actual processors (called "cores"), which are the units that read and execute program instructions.
A multi-core processor is a single computing component with two or more independent actual processors (called "cores"), which are the units that read and execute program instructions.
Multi-Processing Environment
The Multi-Processing Environment (MPE) is used with Message Passing Interface (MPI) programs to provide performance analysis tools, including a set of profiling libraries, a set of utility...
The Multi-Processing Environment (MPE) is used with Message Passing Interface (MPI) programs to provide performance analysis tools, including a set of profiling libraries, a set of utility...
Multiprocessing
Multiprocessing is the use of two or more central processing units (CPUs) within a single computer system.
Multiprocessing is the use of two or more central processing units (CPUs) within a single computer system.
Multiprocessor
Multiprocessing is the use of two or more central processing units (CPUs) within a single computer system.
Multiprocessing is the use of two or more central processing units (CPUs) within a single computer system.
Multithreading (computer architecture)
Multithreading computers have hardware support to efficiently execute multiple threads.
Multithreading computers have hardware support to efficiently execute multiple threads.
Nano brain
A nano brain is a conceptual device that executes massively parallel computing following the information processing principles of human brain.
A nano brain is a conceptual device that executes massively parallel computing following the information processing principles of human brain.
nCUBE
nCUBE was a series of parallel computing computers from the company of the same name.
nCUBE was a series of parallel computing computers from the company of the same name.
Non-Uniform Memory Access
Non-Uniform Memory Access is a computer memory design used in multiprocessing, where the memory access time depends on the memory location relative to a processor.
Non-Uniform Memory Access is a computer memory design used in multiprocessing, where the memory access time depends on the memory location relative to a processor.
occam (programming language)
occam is a concurrent programming language that builds on the Communicating Sequential Processes (CSP) process algebra, and shares many of its features.
occam is a concurrent programming language that builds on the Communicating Sequential Processes (CSP) process algebra, and shares many of its features.
Open MPI
Open MPI is an Message Passing Interface library project combining technologies and resources from several other projects.
Open MPI is an Message Passing Interface library project combining technologies and resources from several other projects.
Open Source Cluster Application Resources
Open Source Cluster Application Resources (OSCAR) is a Linux-based software installation for high-performance cluster computing.
Open Source Cluster Application Resources (OSCAR) is a Linux-based software installation for high-performance cluster computing.
OpenACC
OpenACC is a programming standard for parallel computing developed by Cray, CAPS, Nvidia and PGI. The standard is designed to simplify parallel programming of heterogeneous CPU/GPU systems.
OpenACC is a programming standard for parallel computing developed by Cray, CAPS, Nvidia and PGI. The standard is designed to simplify parallel programming of heterogeneous CPU/GPU systems.
OpenHMPP
Based on a set of directives, OpenHMPP Standard is a programming model designed to handle hardware accelerators without the complexity associated with GPU programming.
Based on a set of directives, OpenHMPP Standard is a programming model designed to handle hardware accelerators without the complexity associated with GPU programming.
openMosix
openMosix was a free cluster management system that provided single-system image capabilities, e.g. automatic work distribution among nodes.
openMosix was a free cluster management system that provided single-system image capabilities, e.g. automatic work distribution among nodes.
OpenMP
Open Multi-Processing (OpenMP) is an application programming interface (API) that supports multi-platform shared memory multiprocessing programming in C, C++, and Fortran, on most processo...
Open Multi-Processing (OpenMP) is an application programming interface (API) that supports multi-platform shared memory multiprocessing programming in C, C++, and Fortran, on most processo...
OpenVMS
OpenVMS, previously known as VAX-11/VMS, VAX/VMS or VMS, is a computer server operating system that runs on VAX, Alpha and Itanium-based families of computers.
OpenVMS, previously known as VAX-11/VMS, VAX/VMS or VMS, is a computer server operating system that runs on VAX, Alpha and Itanium-based families of computers.
Optical Multi-Tree with Shuffle Exchange
An optoelectronic system is basically a hybrid system that exploits both the advantages of electronic and optical communication.
An optoelectronic system is basically a hybrid system that exploits both the advantages of electronic and optical communication.
Oracle Grid Engine
Oracle Grid Engine, previously known as Sun Grid Engine, previously known as CODINE or GRD, is an open source batch-queuing system, developed and supported by Sun Microsystems.
Oracle Grid Engine, previously known as Sun Grid Engine, previously known as CODINE or GRD, is an open source batch-queuing system, developed and supported by Sun Microsystems.
Orc (programming language)
Orc is a concurrent, nondeterministic computer programming language created by Jayadev Misra at the University of Texas at Austin.
Orc is a concurrent, nondeterministic computer programming language created by Jayadev Misra at the University of Texas at Austin.
Padb
PADB is a debugger written by Ashley Pittman for the parallel computer programs.
PADB is a debugger written by Ashley Pittman for the parallel computer programs.
Parallel algorithm
In computer science, a parallel algorithm or concurrent algorithm, as opposed to a traditional sequential algorithm, is an algorithm which can be executed a piece at a time on many differe...
In computer science, a parallel algorithm or concurrent algorithm, as opposed to a traditional sequential algorithm, is an algorithm which can be executed a piece at a time on many differe...
Parallel computation thesis
In computational complexity theory, the parallel computation thesis is a hypothesis which states that the time used by a (reasonable) parallel machine is polynomially related to the space'...
In computational complexity theory, the parallel computation thesis is a hypothesis which states that the time used by a (reasonable) parallel machine is polynomially related to the space'...
Parallel computing
Parallel computing is a form of computation in which many calculations are carried out simultaneously, operating on the principle that large problems can often be divided into smaller ones, whi...
Parallel computing is a form of computation in which many calculations are carried out simultaneously, operating on the principle that large problems can often be divided into smaller ones, whi...
Parallel Element Processing Ensemble
The Parallel Element Processing Ensemble was one of the very early parallel computing systems.
The Parallel Element Processing Ensemble was one of the very early parallel computing systems.
Parallel element processing ensemble
The parallel element processing ensemble (also known as PEPE) was one of the very early parallel computing systems.
The parallel element processing ensemble (also known as PEPE) was one of the very early parallel computing systems.
Parallel programming model
A parallel programming model is a concept that enables the expression of parallel programs which can be compiled and executed.
A parallel programming model is a concept that enables the expression of parallel programs which can be compiled and executed.
Parallel slowdown
Parallel slowdown is a phenomenon in parallel computing where parallelization of a parallel computer program beyond a certain point causes the program to run slower (take more time to run to com...
Parallel slowdown is a phenomenon in parallel computing where parallelization of a parallel computer program beyond a certain point causes the program to run slower (take more time to run to com...
Parallel Virtual Machine
The Parallel Virtual Machine (PVM) is a software tool for parallel networking of computers.
The Parallel Virtual Machine (PVM) is a software tool for parallel networking of computers.
Partitioned global address space
In computer science, the partitioned global address space is a parallel programming model.
In computer science, the partitioned global address space is a parallel programming model.
PeakStream
PeakStream was a parallel processing software company located in San Mateo, California company founded by Matthew Papakipos and Asher Waldfogel in April 2005 and backed by Sequoia Capital and Kl...
PeakStream was a parallel processing software company located in San Mateo, California company founded by Matthew Papakipos and Asher Waldfogel in April 2005 and backed by Sequoia Capital and Kl...
PERCS
PERCS (Productive, Easy-to-use, Reliable Computing System), officially known as the Power 775, is IBM's answer to DARPA's High Productivity Computing Systems (HPCS) initiative.
PERCS (Productive, Easy-to-use, Reliable Computing System), officially known as the Power 775, is IBM's answer to DARPA's High Productivity Computing Systems (HPCS) initiative.
PicoChip
Picochip is a venture-backed fabless semiconductor company based in Bath, England, founded in 2000.
Picochip is a venture-backed fabless semiconductor company based in Bath, England, founded in 2000.
Pilot job
In computer science, a pilot job is a type of multilevel scheduling, in which a resource is acquired by an application so that the application can schedule work into that resource directly, rath...
In computer science, a pilot job is a type of multilevel scheduling, in which a resource is acquired by an application so that the application can schedule work into that resource directly, rath...
Portable Distributed Objects
Portable Distributed Objects, or PDO, is a programming API for creating object-oriented code that can be executed remotely on a network of computers.
Portable Distributed Objects, or PDO, is a programming API for creating object-oriented code that can be executed remotely on a network of computers.
Portals network programming api
Portals is a low-level network API for high-performance networking on high-performance computing systems developed by Sandia National Laboratories and the University of New Mexico.
Portals is a low-level network API for high-performance networking on high-performance computing systems developed by Sandia National Laboratories and the University of New Mexico.
POSIX Threads
POSIX Threads, are usually referred to as Pthreads, is a POSIX standard for threads.
POSIX Threads, are usually referred to as Pthreads, is a POSIX standard for threads.
Prefix sum
The prefix sum (also known as the scan, prefix reduction, or partial sum) is an operation on lists in which each element in the result list is obtained from the sum of the elem...
The prefix sum (also known as the scan, prefix reduction, or partial sum) is an operation on lists in which each element in the result list is obtained from the sum of the elem...
Proactive Discovery of Insider Threats Using Graph Analysis and Learning
Proactive Discovery of Insider Threats Using Graph Analysis and Learning or PRODIGAL is a computer system for predicting anomalous behavior amongst humans by data mining network traffic su...
Proactive Discovery of Insider Threats Using Graph Analysis and Learning or PRODIGAL is a computer system for predicting anomalous behavior amongst humans by data mining network traffic su...
Program Composition Notation
Program Composition Notation (PCN) is a specification notation for building up larger programs from smaller modules or programs (usually written in C or Fortran).
Program Composition Notation (PCN) is a specification notation for building up larger programs from smaller modules or programs (usually written in C or Fortran).
Project Monterey
Project Monterey was an attempt to build a single Unix operating system that ran across a variety of 32-bit and 64-bit platforms, as well as supporting multi-processing.
Project Monterey was an attempt to build a single Unix operating system that ran across a variety of 32-bit and 64-bit platforms, as well as supporting multi-processing.
PyLinda
PyLinda is a Python implementation of the Linda coordination language.
PyLinda is a Python implementation of the Linda coordination language.
QCDOC
The QCDOC, Quantum ChromoDynamics On a Chip, is a supercomputer technology focusing on using relatively cheap low power processing elements to produce a massively parallel machine.
The QCDOC, Quantum ChromoDynamics On a Chip, is a supercomputer technology focusing on using relatively cheap low power processing elements to produce a massively parallel machine.
QCDPAX
The QCDPAX was a processor array designed and built jointly by the University of Tsukuba and Anritsu Corporation for the simulation of the lattice QCD.
The QCDPAX was a processor array designed and built jointly by the University of Tsukuba and Anritsu Corporation for the simulation of the lattice QCD.
Quadrics
Quadrics was a supercomputer company formed in 1996 as a joint venture between Alenia Spazio and the technical team from Meiko Scientific.
Quadrics was a supercomputer company formed in 1996 as a joint venture between Alenia Spazio and the technical team from Meiko Scientific.
QuadricsRms
Quadrics Software is available as RMS (Resource Management System) and Open Source RMS is a Cluster resource manager software package.
Quadrics Software is available as RMS (Resource Management System) and Open Source RMS is a Cluster resource manager software package.
RDMA over Converged Ethernet
RDMA over Converged Ethernet is a network protocol that allows remote direct memory access over an Ethernet network.
RDMA over Converged Ethernet is a network protocol that allows remote direct memory access over an Ethernet network.
Red Storm (computing)
Red Storm is a supercomputer architecture designed for the US Department of Energy’s National Nuclear Security Administration Advanced Simulation and Computing Program.
Red Storm is a supercomputer architecture designed for the US Department of Energy’s National Nuclear Security Administration Advanced Simulation and Computing Program.
Relaxed sequential
In computer science, a relaxed sequential execution model describes the ability for a parallel program to run sequentially.
In computer science, a relaxed sequential execution model describes the ability for a parallel program to run sequentially.
Rendezvous (Plan 9)
Rendezvous is a data synchronization mechanism in Plan 9 from Bell Labs.
Rendezvous is a data synchronization mechanism in Plan 9 from Bell Labs.
Rocks Cluster Distribution
Rocks Cluster Distribution is a Linux distribution intended for high-performance computing clusters.
Rocks Cluster Distribution is a Linux distribution intended for high-performance computing clusters.
RPyC
RPyC (pronounced are-pie-see), or Remote Python Call, is a python library for remote procedure calls (RPC), as well as distributed computing.
RPyC (pronounced are-pie-see), or Remote Python Call, is a python library for remote procedure calls (RPC), as well as distributed computing.
SAGA C++ Reference Implementation
The SAGA C++ Reference Implementation is a set of free cross-platform libraries written in C++ and Python which provide a set of high-level interfaces and runtime components that allow the deve...
The SAGA C++ Reference Implementation is a set of free cross-platform libraries written in C++ and Python which provide a set of high-level interfaces and runtime components that allow the deve...
Scalable Cluster Environment
OpenSCE (Open Scalable Cluster Environment) is an Open-source beowulf-clustering software suite led by Kasetsart University, Thailand.
OpenSCE (Open Scalable Cluster Environment) is an Open-source beowulf-clustering software suite led by Kasetsart University, Thailand.
SciNet Consortium
SciNet is a consortium of the University of Toronto and affiliated Ontario hospitals.
SciNet is a consortium of the University of Toronto and affiliated Ontario hospitals.
Shaheen (supercomputer)
Shaheen consists primarily of a 16-rack IBM Blue Gene/P supercomputer owned and operated by King Abdullah University of Science and Technology (KAUST).
Shaheen consists primarily of a 16-rack IBM Blue Gene/P supercomputer owned and operated by King Abdullah University of Science and Technology (KAUST).
Shared memory
In computing, shared memory is memory that may be simultaneously accessed by multiple programs with an intent to provide communication among them or avoid redundant copies.
In computing, shared memory is memory that may be simultaneously accessed by multiple programs with an intent to provide communication among them or avoid redundant copies.
Shelving buffer
A shelving buffer is a technique used in computer processors to increase the efficiency of superscalar processors.
A shelving buffer is a technique used in computer processors to increase the efficiency of superscalar processors.
SiCortex
SiCortex is a supercomputer manufacturer founded in 2003 and headquartered in Maynard, Massachusetts.
SiCortex is a supercomputer manufacturer founded in 2003 and headquartered in Maynard, Massachusetts.
Sieve C++ Parallel Programming System
The Sieve C++ Parallel Programming System is a C++ compiler and parallel runtime designed and released by Codeplay that aims to simplify the parallelization of code so that it may run efficient...
The Sieve C++ Parallel Programming System is a C++ compiler and parallel runtime designed and released by Codeplay that aims to simplify the parallelization of code so that it may run efficient...
Simple Linux Utility for Resource Management
Simple Linux Utility for Resource Management is an open-source job scheduler used by many of the world's supercomputers and computer clusters.
Simple Linux Utility for Resource Management is an open-source job scheduler used by many of the world's supercomputers and computer clusters.
SMP - Symmetric Multiprocessor System
Multiprocessor system with centralized Shared-Memory called Main Memory operating under a single OS with two or more homogeneous processors.
Multiprocessor system with centralized Shared-Memory called Main Memory operating under a single OS with two or more homogeneous processors.
Speculative multithreading
Speculative multithreading (SpMT), also known as thread level speculation (TLS), is a dynamic parallelization technique that depends on out-of-order execution to achieve speedup on multipr...
Speculative multithreading (SpMT), also known as thread level speculation (TLS), is a dynamic parallelization technique that depends on out-of-order execution to achieve speedup on multipr...
Speedup
In parallel computing, speedup refers to how much a parallel algorithm is faster than a corresponding sequential algorithm.
In parallel computing, speedup refers to how much a parallel algorithm is faster than a corresponding sequential algorithm.
SPMD
In computing, SPMD (Single Process, Multiple Data) or (Single Program, Multiple Data) is a technique employed to achieve parallelism; it is a subc...
In computing, SPMD (Single Process, Multiple Data) or (Single Program, Multiple Data) is a technique employed to achieve parallelism; it is a subc...
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions, is the third iteration of the SSE instruction set for the IA-32 architecture.
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions, is the third iteration of the SSE instruction set for the IA-32 architecture.
Stapl
Stapl (Standard Adaptive Parallel Library) is a library for C++, similar and compatible to STL. It provides parallelism support for writing applications for systems with shared or distributed memory.
Stapl (Standard Adaptive Parallel Library) is a library for C++, similar and compatible to STL. It provides parallelism support for writing applications for systems with shared or distributed memory.
Stone Soupercomputer
The Stone Soupercomputer was a Beowulf computer cluster built at the Oak Ridge National Laboratory in 1997.
The Stone Soupercomputer was a Beowulf computer cluster built at the Oak Ridge National Laboratory in 1997.
Supercomputer
A supercomputer is a computer at the frontline of current processing capacity, particularly speed of calculation.
A supercomputer is a computer at the frontline of current processing capacity, particularly speed of calculation.
SuperPascal
Super Pascal is an imperative, concurrent computing programming language developed by Brinch Hansen.
Super Pascal is an imperative, concurrent computing programming language developed by Brinch Hansen.
Superscalar
A superscalar CPU architecture implements a form of parallelism called instruction level parallelism within a single processor.
A superscalar CPU architecture implements a form of parallelism called instruction level parallelism within a single processor.
SWAR
SWAR is an acronym for SIMD Within A Register.
SWAR is an acronym for SIMD Within A Register.
Symmetric multiprocessing
In computing, symmetric multiprocessing (SMP) involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are...
In computing, symmetric multiprocessing (SMP) involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are...
Symphony (software)
Platform Symphony is a High-performance computing (HPC) software system developed by Platform Computing, the company that developed Load Sharing Facility (LSF).
Platform Symphony is a High-performance computing (HPC) software system developed by Platform Computing, the company that developed Load Sharing Facility (LSF).
Symphony Developer Edition
Symphony Developer Edition (Symphony DE) is a free High-performance computing (HPC) and Grid computing SDK and middleware developed by Platform Computing.
Symphony Developer Edition (Symphony DE) is a free High-performance computing (HPC) and Grid computing SDK and middleware developed by Platform Computing.
Systolic array
In computer architecture, a systolic array is a pipe network arrangement of processing units called cells.
In computer architecture, a systolic array is a pipe network arrangement of processing units called cells.
Task parallelism
Task parallelism (also known as function parallelism and control parallelism) is a form of parallelization of computer code across multiple processors in parallel computing environments.
Task parallelism (also known as function parallelism and control parallelism) is a form of parallelization of computer code across multiple processors in parallel computing environments.
Teramac
The Teramac was an experimental massively parallel computer designed by HP in the 1990s.
The Teramac was an experimental massively parallel computer designed by HP in the 1990s.
Tightly Coupled Systems
Tightly Coupled Systems are systems in which CPUs are connected together in such a way that they share some or all of the system’s memory and I/O resources.
Tightly Coupled Systems are systems in which CPUs are connected together in such a way that they share some or all of the system’s memory and I/O resources.
Tilera
Tilera Corporation is a fabless semiconductor company focusing on scalable multicore embedded processor design.
Tilera Corporation is a fabless semiconductor company focusing on scalable multicore embedded processor design.
Transputer
The transputer was a pioneering microprocessor architecture of the 1980s, featuring integrated memory and serial communication links, intended for parallel computing.
The transputer was a pioneering microprocessor architecture of the 1980s, featuring integrated memory and serial communication links, intended for parallel computing.
Traversed edges per second
The number of Traversed edges per second which can be performed by a supercomputer cluster is a measure of both the communications capabilities and computational power of the machine.
The number of Traversed edges per second which can be performed by a supercomputer cluster is a measure of both the communications capabilities and computational power of the machine.
Tricore
TriCore™ is a 32-bit microcontroller architecture from Infineon.
TriCore™ is a 32-bit microcontroller architecture from Infineon.
Trilinos
Trilinos is a collection of open source software libraries, called packages, intended to be used as building blocks for the development of scientific applications.
Trilinos is a collection of open source software libraries, called packages, intended to be used as building blocks for the development of scientific applications.
TriMedia (Mediaprocessor)
TriMedia is a VLIW Mediaprocessor family from NXP Semiconductors (formerly Philips Semiconductors).
TriMedia is a VLIW Mediaprocessor family from NXP Semiconductors (formerly Philips Semiconductors).
Tuple space
A tuple space is an implementation of the associative memory paradigm for parallel/distributed computing.
A tuple space is an implementation of the associative memory paradigm for parallel/distributed computing.
Ultracomputer
The NYU Ultracomputer is a significant processor design in the history of parallel computing.
The NYU Ultracomputer is a significant processor design in the history of parallel computing.
UniCluster
UniCluster is an open-source software stack maintained by Univa for building Grid Engine high-performance computing clusters.
UniCluster is an open-source software stack maintained by Univa for building Grid Engine high-performance computing clusters.
Unified Parallel C
Unified Parallel C (UPC) is an extension of the C programming language designed for high-performance computing on large-scale parallel machines, including those with a common global addres...
Unified Parallel C (UPC) is an extension of the C programming language designed for high-performance computing on large-scale parallel machines, including those with a common global addres...
Uniform Memory Access
Uniform Memory Access (UMA) is a shared memory architecture used in parallel computers.
Uniform Memory Access (UMA) is a shared memory architecture used in parallel computers.
Uniform memory access
Uniform Memory Access is a shared memory architecture used in parallel computers.
Uniform Memory Access is a shared memory architecture used in parallel computers.
Uniprocessor system
A uniprocessor system is a computer system with a single central processing unit.
A uniprocessor system is a computer system with a single central processing unit.
UPCRC Illinois
UPCRC Illinois is one of two Universal Parallel Computing Research Centers launched in 2008 by Microsoft Corporation and Intel Corporation to accelerate the development of mainstream parallel co...
UPCRC Illinois is one of two Universal Parallel Computing Research Centers launched in 2008 by Microsoft Corporation and Intel Corporation to accelerate the development of mainstream parallel co...
Vector Fabrics, B.V.
Vector Fabrics, B.V. is a company that licenses tools to optimize parallel software for multicore (embedded) systems.
Vector Fabrics, B.V. is a company that licenses tools to optimize parallel software for multicore (embedded) systems.
Vector processor
A vector processor, or array processor, is a central processing unit (CPU) that implements an instruction set containing instructions that operate on one-dimensional arrays of data called ...
A vector processor, or array processor, is a central processing unit (CPU) that implements an instruction set containing instructions that operate on one-dimensional arrays of data called ...
Very long instruction word
Very long instruction word or VLIW refers to a processor architecture designed to take advantage of instruction level parallelism (ILP).
Very long instruction word or VLIW refers to a processor architecture designed to take advantage of instruction level parallelism (ILP).
Virtual Machine Interface
Virtual Machine Interface ("VMI") may refer to a communication protocol for running parallel programs on a distributed memory system.
Virtual Machine Interface ("VMI") may refer to a communication protocol for running parallel programs on a distributed memory system.
Visual Instruction Set
Visual Instruction Set, or VIS, is a SIMD instruction set for SPARC V9 microprocessors developed by Sun Microsystems.
Visual Instruction Set, or VIS, is a SIMD instruction set for SPARC V9 microprocessors developed by Sun Microsystems.
WARP (systolic array)
The Warp machines were a series of increasingly general-purpose systolic array processors, created by Carnegie Mellon University (CMU), in conjunction with industrial partners G.E., Honeywel...
The Warp machines were a series of increasingly general-purpose systolic array processors, created by Carnegie Mellon University (CMU), in conjunction with industrial partners G.E., Honeywel...
XCore XS1-G4
The XS1-G4 is a processor designed by XMOS. It is a 32-bit quad-core processor, where each core runs up to 8 concurrent threads.
The XS1-G4 is a processor designed by XMOS. It is a 32-bit quad-core processor, where each core runs up to 8 concurrent threads.
XCore XS1-L1
The XS1-L1 is a processor designed by XMOS. It is a 32-bit processor, that runs up to 8 concurrent threads.
The XS1-L1 is a processor designed by XMOS. It is a 32-bit processor, that runs up to 8 concurrent threads.
Xetal
Xetal is the name of a family of massively parallel processors developed within Philips Research and NXP Semiconductors.
Xetal is the name of a family of massively parallel processors developed within Philips Research and NXP Semiconductors.
ZPL (programming language)
ZPL (short for Z-level Programming Language) is an array programming language designed to replace C and C++ programming languages in engineering and scientific applications.
ZPL (short for Z-level Programming Language) is an array programming language designed to replace C and C++ programming languages in engineering and scientific applications.