SettingsSemiconductor device fabrication
Advanced Silicon Etch
Advanced Silicon Etch (ASE) is a deep reactive ion etching (DRIE) technique to rapidly etch deep and high aspect ratio structures in silicon.
Advanced Silicon Etch (ASE) is a deep reactive ion etching (DRIE) technique to rapidly etch deep and high aspect ratio structures in silicon.
Airgap (microelectronics)
Airgap is an invention in microelectronic fabrication by IBM.
Airgap is an invention in microelectronic fabrication by IBM.
Alfred Y. Cho
Alfred Yi Cho (Chinese: 卓以和;) (born July 10, 1937) is the Adjunct Vice President of Semiconductor Research at Alcatel-Lucent's Bell Labs.
Alfred Yi Cho (Chinese: 卓以和;) (born July 10, 1937) is the Adjunct Vice President of Semiconductor Research at Alcatel-Lucent's Bell Labs.
B-staging
B-staging is a process that utilizes heat or UV light to remove the majority of solvent from an adhesive, thereby allowing construction to be “staged.” In between adhesive application, assembl...
B-staging is a process that utilizes heat or UV light to remove the majority of solvent from an adhesive, thereby allowing construction to be “staged.” In between adhesive application, assembl...
Back end of line
The back end of line is the second portion of IC fabrication where the individual devices get interconnected with wiring on the wafer.
The back end of line is the second portion of IC fabrication where the individual devices get interconnected with wiring on the wafer.
Ball bonding
Ball bonding is a type of wire bonding, and is the most common way to make the electrical interconnections between a chip and the outside world as part of semiconductor device fabrication.
Ball bonding is a type of wire bonding, and is the most common way to make the electrical interconnections between a chip and the outside world as part of semiconductor device fabrication.
Barrier metal
A barrier metal is a material used in integrated circuits to chemically isolate semiconductors from soft metal interconnects, while maintaining an electrical connection between them.
A barrier metal is a material used in integrated circuits to chemically isolate semiconductors from soft metal interconnects, while maintaining an electrical connection between them.
Battle of Churubusco
The Battle of Churubusco took place on August 20, 1847, in the immediate aftermath of the Battle of Contreras during the Mexican-American War.
The Battle of Churubusco took place on August 20, 1847, in the immediate aftermath of the Battle of Contreras during the Mexican-American War.
BEOL
Back-end-of-line (BEOL) denotes the second portion of IC fabrication where the individual devices (transistors, capacitors, resistors, etc.) get interconnected with wiring on the wafer.
Back-end-of-line (BEOL) denotes the second portion of IC fabrication where the individual devices (transistors, capacitors, resistors, etc.) get interconnected with wiring on the wafer.
Borophosphosilicate glass
Borophosphosilicate glass, commonly known as BPSG, is a type of silicate glass that includes additives of both boron and phosphorus.
Borophosphosilicate glass, commonly known as BPSG, is a type of silicate glass that includes additives of both boron and phosphorus.
Bow and warp of semiconductor wafers and substrates
Bow and warp of semiconductor wafers and substrates are measures of the flatness of wafers.
Bow and warp of semiconductor wafers and substrates are measures of the flatness of wafers.
Capacitance voltage profiling
The "CV", or more correctly "C-V", in C-V profiling, stands for capacitance-voltage, and refers to a technique used for characterization of semiconductor materials and devices.
The "CV", or more correctly "C-V", in C-V profiling, stands for capacitance-voltage, and refers to a technique used for characterization of semiconductor materials and devices.
Channel-stopper
In semiconductor device fabrication, channel-stopper or channel-stop is an area in semiconductor devices produced by implantation or diffusion of ions, by growing or patterning the silico...
In semiconductor device fabrication, channel-stopper or channel-stop is an area in semiconductor devices produced by implantation or diffusion of ions, by growing or patterning the silico...
Chemical vapor deposition
Chemical vapor deposition (CVD) is a chemical process used to produce high-purity, high-performance solid materials.
Chemical vapor deposition (CVD) is a chemical process used to produce high-purity, high-performance solid materials.
Chemical-mechanical planarization
Chemical Mechanical Polishing/Planarization is a process of smoothing surfaces with the combination of chemical and mechanical forces.
Chemical Mechanical Polishing/Planarization is a process of smoothing surfaces with the combination of chemical and mechanical forces.
Cleanroom
A cleanroom or clean room is an environment, typically used in manufacturing or scientific research, that has a low level of environmental pollutants such as dust, airborne microbes, aeros...
A cleanroom or clean room is an environment, typically used in manufacturing or scientific research, that has a low level of environmental pollutants such as dust, airborne microbes, aeros...
Common Platform
Common Platform is a collaboration between IBM, GlobalFoundries, and Samsung Electronics developed to implement a common process technology across all three companies' semiconductor manufacturin...
Common Platform is a collaboration between IBM, GlobalFoundries, and Samsung Electronics developed to implement a common process technology across all three companies' semiconductor manufacturin...
Dark current spectroscopy
Dark Current Spectroscopy is a technique that is used to determine contaminants in silicon.
Dark Current Spectroscopy is a technique that is used to determine contaminants in silicon.
Deal-Grove model
The Deal-Grove model mathematically describes the growth of an oxide layer on the surface of a material.
The Deal-Grove model mathematically describes the growth of an oxide layer on the surface of a material.
Deep reactive-ion etching
Deep reactive-ion etching (DRIE) is a highly anisotropic etch process used to create deep penetration, steep-sided holes and trenches in wafers, with aspect ratios of 20:1 or more.
Deep reactive-ion etching (DRIE) is a highly anisotropic etch process used to create deep penetration, steep-sided holes and trenches in wafers, with aspect ratios of 20:1 or more.
Device under test
Device under test (DUT), also known as unit under test (UUT), is a term commonly used to refer to a manufactured product undergoing testing.
Device under test (DUT), also known as unit under test (UUT), is a term commonly used to refer to a manufactured product undergoing testing.
Dicing tape
Dicing tape is a backing tape used during wafer dicing, the cutting apart of pieces of semiconductor material following wafer microfabrication.
Dicing tape is a backing tape used during wafer dicing, the cutting apart of pieces of semiconductor material following wafer microfabrication.
Die attachment
Die attachment is the step during the integrated circuit packaging phase of semiconductor device fabrication during which a die is mounted and fixed to the package or support structure.
Die attachment is the step during the integrated circuit packaging phase of semiconductor device fabrication during which a die is mounted and fixed to the package or support structure.
Die preparation
Die preparation is a step of semiconductor device fabrication during which a wafer is prepared for IC packaging and IC testing.
Die preparation is a step of semiconductor device fabrication during which a wafer is prepared for IC packaging and IC testing.
Doping (semiconductor)
In semiconductor production, doping intentionally introduces impurities into an extremely pure semiconductor for the purpose of modulating its electrical properties.
In semiconductor production, doping intentionally introduces impurities into an extremely pure semiconductor for the purpose of modulating its electrical properties.
Drive Level Capacitance Profiling
Drive Level Capacitance Profiling (DLCP) is a type of capacitance voltage profiling characterization technique developed specifically for amorphous and polycrystalline materials which have more ...
Drive Level Capacitance Profiling (DLCP) is a type of capacitance voltage profiling characterization technique developed specifically for amorphous and polycrystalline materials which have more ...
Dry etching
Dry etching refers to the removal of material, typically a masked pattern of semiconductor material, by exposing the material to a bombardment of ions (usually a plasma of reactive gases such as...
Dry etching refers to the removal of material, typically a masked pattern of semiconductor material, by exposing the material to a bombardment of ions (usually a plasma of reactive gases such as...
Electron beam induced current
Electron beam induced current (EBIC) is a semiconductor analysis technique performed in a scanning electron microscope (SEM) or scanning transmission electron microscope (STEM).
Electron beam induced current (EBIC) is a semiconductor analysis technique performed in a scanning electron microscope (SEM) or scanning transmission electron microscope (STEM).
Electrostatic spray assisted vapour deposition
Electrostatic spray assisted vapour deposition (ESAVD) is a technique (developed by a company called IMPT) to deposit both thin and thick layers of a coating onto various substrates.
Electrostatic spray assisted vapour deposition (ESAVD) is a technique (developed by a company called IMPT) to deposit both thin and thick layers of a coating onto various substrates.
Epitaxy
Epitaxy refers to the deposition of a crystalline overlayer on a crystalline substrate, where the overlayer is in registry with the substrate.
Epitaxy refers to the deposition of a crystalline overlayer on a crystalline substrate, where the overlayer is in registry with the substrate.
Epiwafer
An epiwafer is a wafer of semiconducting material made by epitaxial growth (called epitaxy) for use in making microelectronic devices such as light-emitting diodes (LEDs).
An epiwafer is a wafer of semiconducting material made by epitaxial growth (called epitaxy) for use in making microelectronic devices such as light-emitting diodes (LEDs).
Etching (microfabrication)
Etching is used in microfabrication to chemically remove layers from the surface of a wafer during manufacturing.
Etching is used in microfabrication to chemically remove layers from the surface of a wafer during manufacturing.
EV Group
EV Group is a supplier of wafer processing solutions for the semiconductor, MEMS and nanotechnology industry.
EV Group is a supplier of wafer processing solutions for the semiconductor, MEMS and nanotechnology industry.
Fabless semiconductor company
A fabless semiconductor company specializes in the design and sale of hardware devices and semiconductor chips while outsourcing the fabrication or "fab" of the devices to a specialized ma...
A fabless semiconductor company specializes in the design and sale of hardware devices and semiconductor chips while outsourcing the fabrication or "fab" of the devices to a specialized ma...
FEOL
FEOL (front-end-of-line) denotes the first portion of IC fabrication where the individual devices (transistors, capacitors, resistors, etc.) are patterned in the semiconductor.
FEOL (front-end-of-line) denotes the first portion of IC fabrication where the individual devices (transistors, capacitors, resistors, etc.) are patterned in the semiconductor.
Finetech
Finetech GmbH & Co. KG makes equipment for various kinds of rework and micro assembly operations.
Finetech GmbH & Co. KG makes equipment for various kinds of rework and micro assembly operations.
Focused ion beam
Focused ion beam, also known as FIB, is a technique used particularly in the semiconductor and materials science fields for site-specific analysis, deposition, and ablation of materials.
Focused ion beam, also known as FIB, is a technique used particularly in the semiconductor and materials science fields for site-specific analysis, deposition, and ablation of materials.
Front end of line
The front-end-of-line is the first portion of IC fabrication where the individual devices are patterned in the semiconductor.
The front-end-of-line is the first portion of IC fabrication where the individual devices are patterned in the semiconductor.
Furnace anneal
Furnace annealing is a process used in semiconductor device fabrication which consist of heating multiple semiconductor wafers in order to affect their electrical properties.
Furnace annealing is a process used in semiconductor device fabrication which consist of heating multiple semiconductor wafers in order to affect their electrical properties.
Gas immersion laser doping
Gas Immersion Laser Doping is a method of doping a semiconductor material like Silicon.
Gas Immersion Laser Doping is a method of doping a semiconductor material like Silicon.
Gate count
In microprocessor design, gate count refers to the number of transistor switches, or gates, that are needed to implement a design.
In microprocessor design, gate count refers to the number of transistor switches, or gates, that are needed to implement a design.
Hardmask
A hardmask is a material used in semiconductor processing as an etch mask in lieu of polymer or other organic "soft" materials.
A hardmask is a material used in semiconductor processing as an etch mask in lieu of polymer or other organic "soft" materials.
Health hazards in semiconductor manufacturing occupations
Health hazards in semiconductor manufacturing occupations is an issue of dispute past and present workers of semiconductor manufacturing have with their employers and associates of their employers.
Health hazards in semiconductor manufacturing occupations is an issue of dispute past and present workers of semiconductor manufacturing have with their employers and associates of their employers.
High-Speed SECS Message Services
The High-Speed SECS Message Services protocol is a standard transport protocol for communication between computers in semiconductor factories.
The High-Speed SECS Message Services protocol is a standard transport protocol for communication between computers in semiconductor factories.
Homotopotaxy
Homotopotaxy is a process similar to homoepitaxy except for the fact that the thin film growth is not limited to two dimensional growth.
Homotopotaxy is a process similar to homoepitaxy except for the fact that the thin film growth is not limited to two dimensional growth.
Hydride vapour phase epitaxy
Hydride vapour phase epitaxy is an epitaxial growth technique often employed to produce semiconductors such as GaN, GaAs, InP and their related compounds.
Hydride vapour phase epitaxy is an epitaxial growth technique often employed to produce semiconductors such as GaN, GaAs, InP and their related compounds.
Integrated circuit encapsulation
Integrated circuit encapsulation (IC encapsulation, encapsulation) is the design and manufacturing of protective packages for integrated circuits.
Integrated circuit encapsulation (IC encapsulation, encapsulation) is the design and manufacturing of protective packages for integrated circuits.
Integrated circuit packaging
Integrated circuit packaging is the final stage of semiconductor device fabrication per se, followed by IC testing.
Integrated circuit packaging is the final stage of semiconductor device fabrication per se, followed by IC testing.
Integrated device manufacturer
An integrated device manufacturer (IDM) is a semiconductor company which designs, manufactures, and sells integrated circuit (IC) products.
An integrated device manufacturer (IDM) is a semiconductor company which designs, manufactures, and sells integrated circuit (IC) products.
Ion beam
An ion beam is a type of charged particle beam consisting of ions.
An ion beam is a type of charged particle beam consisting of ions.
Ion beam lithography
Ion beam lithography is the practice of scanning a focused beam of ions in a patterned fashion across a surface in order to create create very small structures such as integrated circuits or oth...
Ion beam lithography is the practice of scanning a focused beam of ions in a patterned fashion across a surface in order to create create very small structures such as integrated circuits or oth...
Ion beam mixing
Ion Beam Mixing is a process for adhering two multilayers, especially a substrate and deposited surface layer.
Ion Beam Mixing is a process for adhering two multilayers, especially a substrate and deposited surface layer.
Ion implantation
Ion implantation is a materials engineering process by which ions of a material are accelerated in an electrical field and impacted into another solid.
Ion implantation is a materials engineering process by which ions of a material are accelerated in an electrical field and impacted into another solid.
Ion Layer Gas Reaction
Ion Layer Gas Reaction is a non vacuum, thin film deposition technique developed and patented by the group of Professor Dr. Christian-Herbert Fischer at the Helmholtz-Zentrum Berlin for material...
Ion Layer Gas Reaction is a non vacuum, thin film deposition technique developed and patented by the group of Professor Dr. Christian-Herbert Fischer at the Helmholtz-Zentrum Berlin for material...
Kinetic Monte Carlo surface growth method
Surface growth has been increasingly interesting technologically as well as theoretically.
Surface growth has been increasingly interesting technologically as well as theoretically.
Klaiber's Law
Simply stated, Klaiber's Law proposes that "the silicon wafer size will dictate the largest diameter of ultrapure water supply piping needed within a semiconductor wafer factory.
Simply stated, Klaiber's Law proposes that "the silicon wafer size will dictate the largest diameter of ultrapure water supply piping needed within a semiconductor wafer factory.
Klaiber's law
Simply stated, Klaiber's law proposes that "the silicon wafer size will dictate the largest diameter of ultrapure water supply piping needed within a semiconductor wafer factory.
Simply stated, Klaiber's law proposes that "the silicon wafer size will dictate the largest diameter of ultrapure water supply piping needed within a semiconductor wafer factory.
Laser trimming
Laser trimming is the manufacturing process of using a laser to adjust the operating parameters of an electronic circuit.
Laser trimming is the manufacturing process of using a laser to adjust the operating parameters of an electronic circuit.
Layer (electronics)
A layer is the deposition of molecules on a substrate or base (glass, ceramic, semiconductor, or plastic/bioplastic).
A layer is the deposition of molecules on a substrate or base (glass, ceramic, semiconductor, or plastic/bioplastic).
Lift-off (microtechnology)
Lift-off process in microstructuring technology is a method of creating structures (patterning) of a target material on the surface of a substrate (ex.
Lift-off process in microstructuring technology is a method of creating structures (patterning) of a target material on the surface of a substrate (ex.
Metal-induced crystallization
Metal-induced crystallization (MIC) is a method by which amorphous silicon, or a-Si, can be turned into polycrystalline silicon at relatively low temperatures.
Metal-induced crystallization (MIC) is a method by which amorphous silicon, or a-Si, can be turned into polycrystalline silicon at relatively low temperatures.
Metalorganic chemical vapor deposition
Metalorganic chemical vapor deposition (MOCVD) is a chemical vapor deposition process that uses metalorganic source gases.
Metalorganic chemical vapor deposition (MOCVD) is a chemical vapor deposition process that uses metalorganic source gases.
Microfabrication
Microfabrication is the term that describes processes of fabrication of miniature structures, of micrometre sizes and smaller.
Microfabrication is the term that describes processes of fabrication of miniature structures, of micrometre sizes and smaller.
Micropipe
A micropipe, also called micropore, microtube, capillary defect or pinhole defect, is a crystallographic defect in a single crystal substrate.
A micropipe, also called micropore, microtube, capillary defect or pinhole defect, is a crystallographic defect in a single crystal substrate.
Monolayer doping
Monolayer doping (MLD) is a well controlled, wafer-scale surface doping technique first developed at the University of California, Berkeley, in 2007.
Monolayer doping (MLD) is a well controlled, wafer-scale surface doping technique first developed at the University of California, Berkeley, in 2007.
MOSIS
MOSIS is probably the oldest integrated circuit foundry service and one of the first Internet services other than supercomputing services and basic infrastructure such as E-mail or File Transfer...
MOSIS is probably the oldest integrated circuit foundry service and one of the first Internet services other than supercomputing services and basic infrastructure such as E-mail or File Transfer...
Multi-project wafer service
Multi-Project Chip (MPC) or Multi-Project Wafer (MPW) services integrate onto microelectronics wafers a number of different integrated circuit designs from various teams including designs from p...
Multi-Project Chip (MPC) or Multi-Project Wafer (MPW) services integrate onto microelectronics wafers a number of different integrated circuit designs from various teams including designs from p...
Negative bias temperature instability
Negative bias temperature instability (NBTI) is a key reliability issue in MOSFETs. It is of immediate concern in p-channel MOS devices, since they almost always operate with negative gate-to-so...
Negative bias temperature instability (NBTI) is a key reliability issue in MOSFETs. It is of immediate concern in p-channel MOS devices, since they almost always operate with negative gate-to-so...
Ohmic contact
An ohmic contact is a non-rectifying junction—a region in a semiconductor device that has been prepared so that the current–voltage curve of the region is linear and symmetric.
An ohmic contact is a non-rectifying junction—a region in a semiconductor device that has been prepared so that the current–voltage curve of the region is linear and symmetric.
Oramir
Oramir Semiconductor Equipment Ltd. was founded in the year 1992 by Teuza Venture Capital Fund and Rafael Development Corporation of Israel.
Oramir Semiconductor Equipment Ltd. was founded in the year 1992 by Teuza Venture Capital Fund and Rafael Development Corporation of Israel.
Overlay Control
Overlay control is the term used to define the control of this pattern-to-pattern alignment.
Overlay control is the term used to define the control of this pattern-to-pattern alignment.
Package on package
Package on Package is an integrated circuit packaging technique to allow vertically combining discrete logic and memory ball grid array packages.
Package on Package is an integrated circuit packaging technique to allow vertically combining discrete logic and memory ball grid array packages.
Phenol formaldehyde resin
Phenol formaldehyde resins (PF) include synthetic thermosetting resins such as obtained by the reaction of phenols with formaldehyde.
Phenol formaldehyde resins (PF) include synthetic thermosetting resins such as obtained by the reaction of phenols with formaldehyde.
Phosphosilicate glass
Phosphosilicate glass, commonly referred to by the acronym PSG, is a silicate glass commonly used in semiconductor device fabrication for intermetal layers, i.e., insulating layers deposit...
Phosphosilicate glass, commonly referred to by the acronym PSG, is a silicate glass commonly used in semiconductor device fabrication for intermetal layers, i.e., insulating layers deposit...
Physical vapor deposition
Physical vapor deposition is a variety of vacuum deposition and is a general term used to describe any of a variety of methods to deposit thin films by the condensation of a vaporized form of th...
Physical vapor deposition is a variety of vacuum deposition and is a general term used to describe any of a variety of methods to deposit thin films by the condensation of a vaporized form of th...
Planar process
The planar process is a manufacturing process used in the semiconductor industry to build individual components of a transistor, and in turn, connect those transistors together.
The planar process is a manufacturing process used in the semiconductor industry to build individual components of a transistor, and in turn, connect those transistors together.
Plasma ashing
In semiconductor manufacturing plasma ashing is the process of removing the photoresist from an etched wafer.
In semiconductor manufacturing plasma ashing is the process of removing the photoresist from an etched wafer.
Plasma cleaning
Plasma cleaning involves the removal of impurities and contaminants from surfaces through the use of an energetic plasma created from gaseous species.
Plasma cleaning involves the removal of impurities and contaminants from surfaces through the use of an energetic plasma created from gaseous species.
Plasma etcher
A plasma etcher, or etching tool, is a tool used in the production of semiconductor devices.
A plasma etcher, or etching tool, is a tool used in the production of semiconductor devices.
Plasma etching
Plasma etching is a form of plasma processing used to fabricate integrated circuits.
Plasma etching is a form of plasma processing used to fabricate integrated circuits.
Plasma-enhanced chemical vapor deposition
Plasma-enhanced chemical vapor deposition is a process used to deposit thin films from a gas state to a solid state on a substrate.
Plasma-enhanced chemical vapor deposition is a process used to deposit thin films from a gas state to a solid state on a substrate.
Plasma-immersion ion implantation
Plasma-immersion ion implantation (PIII) or pulsed-plasma doping (pulsed PIII) is a surface modification technique of extracting the accelerated ions from the plasma by applying a high voltage ...
Plasma-immersion ion implantation (PIII) or pulsed-plasma doping (pulsed PIII) is a surface modification technique of extracting the accelerated ions from the plasma by applying a high voltage ...
Polycide
Polycide is a silicide formed over polysilicon.
Polycide is a silicide formed over polysilicon.
Process design kit
A process design kit (PDK) is a set of files used within the semiconductor industry to model transistors for a certain technology for a certain foundry.
A process design kit (PDK) is a set of files used within the semiconductor industry to model transistors for a certain technology for a certain foundry.
Process variation (semiconductor)
Process variation is the naturally occurring variation the attributes of transistors when integrated circuits are fabricated.
Process variation is the naturally occurring variation the attributes of transistors when integrated circuits are fabricated.
Product engineering
Product engineering refers to the process of designing and developing a device, assembly, or system such that it be produced as an item for sale through some production manufacturing process.
Product engineering refers to the process of designing and developing a device, assembly, or system such that it be produced as an item for sale through some production manufacturing process.
PROLITH
PROLITH (abbreviated from Positive Resist Optical LITHography) is a computer simulator modeling the optical and chemical aspects of photolithography.
PROLITH (abbreviated from Positive Resist Optical LITHography) is a computer simulator modeling the optical and chemical aspects of photolithography.
Pulsed laser deposition
Pulsed laser deposition is a thin film deposition technique where a high power pulsed laser beam is focused inside a vacuum chamber to strike a target of the material that is to be deposited.
Pulsed laser deposition is a thin film deposition technique where a high power pulsed laser beam is focused inside a vacuum chamber to strike a target of the material that is to be deposited.
Rapid thermal processing
Rapid Thermal Processing (or RTP) refers to a semiconductor manufacturing process which heats silicon wafers to high temperatures (up to 1,200 °C or greater) on a timescale of several seco...
Rapid Thermal Processing (or RTP) refers to a semiconductor manufacturing process which heats silicon wafers to high temperatures (up to 1,200 °C or greater) on a timescale of several seco...
RCA clean
The RCA clean is a standard set of wafer cleaning steps which need to be performed before high temp processing steps of silicon wafers in semiconductor manufacturing.
The RCA clean is a standard set of wafer cleaning steps which need to be performed before high temp processing steps of silicon wafers in semiconductor manufacturing.
Redistribution layer
A Redistribution Layer (RDL) is an extra metal layer on a chip that makes the IO pads of an integrated circuit available in other locations.
A Redistribution Layer (RDL) is an extra metal layer on a chip that makes the IO pads of an integrated circuit available in other locations.
Resist
In semiconductor fabrication, a resist is a thin layer used to transfer a circuit pattern to the semiconductor substrate which it is deposited upon.
In semiconductor fabrication, a resist is a thin layer used to transfer a circuit pattern to the semiconductor substrate which it is deposited upon.
Rigid needle adapter
The concept of the Rigid Needle Adapter makes possible a contacting of finest structures on printed and assembled circuit carriers and also direct contacting in fine-pole connectors.
The concept of the Rigid Needle Adapter makes possible a contacting of finest structures on printed and assembled circuit carriers and also direct contacting in fine-pole connectors.
Salicide
The term salicide refers to a technology used in the microelectronics industry used to form electrical contacts between the semiconductor device and the supporting interconnect structure.
The term salicide refers to a technology used in the microelectronics industry used to form electrical contacts between the semiconductor device and the supporting interconnect structure.
SECS/GEM
The SECS/GEM interface is the semiconductor industry's standard for equipment-to-host communications.
The SECS/GEM interface is the semiconductor industry's standard for equipment-to-host communications.
Selective area epitaxy
Selective area epitaxy is the local growth of epitaxial layer through a patterned dielectric mask (typically SiO2 or Si3O4) deposited on a semiconductor substrate.
Selective area epitaxy is the local growth of epitaxial layer through a patterned dielectric mask (typically SiO2 or Si3O4) deposited on a semiconductor substrate.
Semiconductor device fabrication
Semiconductor device fabrication is the process used to create the integrated circuits that are present in everyday electrical and electronic devices.
Semiconductor device fabrication is the process used to create the integrated circuits that are present in everyday electrical and electronic devices.
Semiconductor Equipment and Materials International
Semiconductor Equipment and Materials International (SEMI) is a trade organization of manufacturers of equipment and materials used in the fabrication of semiconductor devices such as inte...
Semiconductor Equipment and Materials International (SEMI) is a trade organization of manufacturers of equipment and materials used in the fabrication of semiconductor devices such as inte...
Semiconductor fabrication plant
In the microelectronics industry, a semiconductor fabrication plant is a factory where devices such as integrated circuits are manufactured.
In the microelectronics industry, a semiconductor fabrication plant is a factory where devices such as integrated circuits are manufactured.
Semiconductor industry
The semiconductor industry is the aggregate collection of companies engaged in the design and fabrication of semiconductor devices.
The semiconductor industry is the aggregate collection of companies engaged in the design and fabrication of semiconductor devices.
Shallow trench isolation
Shallow trench isolation (STI), also known as Box Isolation Technique, is an integrated circuit feature which prevents electrical current leakage between adjacent semiconductor devic...
Shallow trench isolation (STI), also known as Box Isolation Technique, is an integrated circuit feature which prevents electrical current leakage between adjacent semiconductor devic...
Silicon intellectual property
Silicon Intellectual Property is a business model for a semiconductor company where the company licenses its technology to a customer as intellectual property.
Silicon Intellectual Property is a business model for a semiconductor company where the company licenses its technology to a customer as intellectual property.
Silicon on sapphire
Silicon on sapphire is a hetero-epitaxial process for integrated circuit manufacturing that consists of a thin layer of silicon grown on a sapphire wafer.
Silicon on sapphire is a hetero-epitaxial process for integrated circuit manufacturing that consists of a thin layer of silicon grown on a sapphire wafer.
Smart Cut
Smart Cut is a technological process that enables the transfer of very fine layers of crystalline material onto a mechanical support.
Smart Cut is a technological process that enables the transfer of very fine layers of crystalline material onto a mechanical support.
Spreading Resistance Profiling
Spreading Resistance Profiling (SRP), also known as Spreading Resistance Analysis (SRA), is a technique used to analyze resistivity vs. depth in semiconductors.
Spreading Resistance Profiling (SRP), also known as Spreading Resistance Analysis (SRA), is a technique used to analyze resistivity vs. depth in semiconductors.
Sputter deposition
Sputter deposition is a physical vapor deposition method of depositing thin films by sputtering, that is ejecting, material from a "target," that is source, which then deposits onto a "substrate...
Sputter deposition is a physical vapor deposition method of depositing thin films by sputtering, that is ejecting, material from a "target," that is source, which then deposits onto a "substrate...
Strained silicon directly on insulator
Strained silicon directly on insulator (SSDOI) is a procedure developed by IBM which removes the silicon germanium layer in the strained silicon process leaving the strained silicon directly on ...
Strained silicon directly on insulator (SSDOI) is a procedure developed by IBM which removes the silicon germanium layer in the strained silicon process leaving the strained silicon directly on ...
Stress migration
Stress Migration is a failure mechanism that often occurs in IC metallization (aluminum, copper).
Stress Migration is a failure mechanism that often occurs in IC metallization (aluminum, copper).
Substrate mapping
Substrate mapping, also known as 'wafer mapping' is a process in which the performance of semiconductor devices on a substrate is represented by a map showing the performance as a colour-coded grid.
Substrate mapping, also known as 'wafer mapping' is a process in which the performance of semiconductor devices on a substrate is represented by a map showing the performance as a colour-coded grid.
Thermosonic bonding
Thermosonic bonding is widely used to permanently interconnect metallized silicon integrated circuits and other components into computers as well as into a myriad of other electronic equipment.
Thermosonic bonding is widely used to permanently interconnect metallized silicon integrated circuits and other components into computers as well as into a myriad of other electronic equipment.
Three-dimensional integrated circuit
In electronics, a three-dimensional integrated circuit is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit.
In electronics, a three-dimensional integrated circuit is a chip in which two or more layers of active electronic components are integrated both vertically and horizontally into a single circuit.
Through-silicon via
In electronic engineering, a through-silicon via is a vertical electrical connection passing completely through a silicon wafer or die.
In electronic engineering, a through-silicon via is a vertical electrical connection passing completely through a silicon wafer or die.
Titanium nitride
Titanium nitride is an extremely hard ceramic material, often used as a coating on titanium alloys, steel, carbide, and aluminium components to improve the substrate's surface properties.
Titanium nitride is an extremely hard ceramic material, often used as a coating on titanium alloys, steel, carbide, and aluminium components to improve the substrate's surface properties.
Triethylgallium
Triethylgallium, Ga(C2H5)3, or TEGa, is a metalorganic source of gallium for metalorganic vapour phase epitaxy (MOVPE) of compound semiconductors.
Triethylgallium, Ga(C2H5)3, or TEGa, is a metalorganic source of gallium for metalorganic vapour phase epitaxy (MOVPE) of compound semiconductors.
Trimethylgallium
Trimethylgallium, Ga(CH3)3, often abbreviated to TMG or TMGa, is the preferred metalorganic source of gallium for metalorganic vapour phase epitaxy (MOVPE) of gallium-contai...
Trimethylgallium, Ga(CH3)3, often abbreviated to TMG or TMGa, is the preferred metalorganic source of gallium for metalorganic vapour phase epitaxy (MOVPE) of gallium-contai...
Ultra High Purity Steam for Oxidation and Annealing
Ultra High Purity Steam for Oxidation and Annealing Ultra High Purity Steam, also called clean steam, UHP steam or high purity water vapor, is used in a variety of industrial manufacturing proce...
Ultra High Purity Steam for Oxidation and Annealing Ultra High Purity Steam, also called clean steam, UHP steam or high purity water vapor, is used in a variety of industrial manufacturing proce...
Ultra-high-purity steam for oxidation and annealing
Ultra-high-purity steam, also called clean steam, UHP steam or high purity water vapor, is used in a variety of industrial manufacturing processes that require oxidation or annealing.
Ultra-high-purity steam, also called clean steam, UHP steam or high purity water vapor, is used in a variety of industrial manufacturing processes that require oxidation or annealing.
Vapour phase decomposition
Vapour phase decomposition (VPD) is a method used in the semiconductor industry to improve the sensitivity of total-reflection X-ray fluorescence spectroscopy by changing the contaminant from a ...
Vapour phase decomposition (VPD) is a method used in the semiconductor industry to improve the sensitivity of total-reflection X-ray fluorescence spectroscopy by changing the contaminant from a ...
Wafer (electronics)
In electronics, a wafer is a thin slice of semiconductor material, such as a silicon crystal, used in the fabrication of integrated circuits and other microdevices.
In electronics, a wafer is a thin slice of semiconductor material, such as a silicon crystal, used in the fabrication of integrated circuits and other microdevices.
Wafer backgrinding
Wafer backgrinding is a semiconductor device fabrication step during which wafer thickness is reduced to allow for stacking and high density packaging of integrated circuits (IC).
Wafer backgrinding is a semiconductor device fabrication step during which wafer thickness is reduced to allow for stacking and high density packaging of integrated circuits (IC).
Wafer dicing
Wafer dicing is the process by which die are separated from a wafer of semiconductor following the processing of the wafer.
Wafer dicing is the process by which die are separated from a wafer of semiconductor following the processing of the wafer.
Wafer fabrication
Wafer fabrication is a procedure composed of many repeated sequential processes to produce complete electrical or photonic circuits.
Wafer fabrication is a procedure composed of many repeated sequential processes to produce complete electrical or photonic circuits.
Wafer testing
Wafer testing is a step performed during semiconductor device fabrication.
Wafer testing is a step performed during semiconductor device fabrication.
Wafer-scale integration
Wafer-scale integration, WSI for short, is a yet-unused system of building very-large integrated circuit networks that use an entire silicon wafer to produce a single "super-chip".
Wafer-scale integration, WSI for short, is a yet-unused system of building very-large integrated circuit networks that use an entire silicon wafer to produce a single "super-chip".
Wire bonding
Wire bonding is the primary method of making interconnections between an integrated circuit (IC) and a printed circuit board (PCB) during semiconductor device fabrication.
Wire bonding is the primary method of making interconnections between an integrated circuit (IC) and a printed circuit board (PCB) during semiconductor device fabrication.