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  1. scs.stanford.edu

    • a7 encodes the SBI extension ID (EID), • a6 encodes the SBI function ID (FID) for a given extension ID encoded in a7 for any SBI extension defined in or after SBI v0.2. • All registers except a0 & a1 must be preserved across an SBI call by the callee. • SBI functions must return a pair of values in a0 and a1, with a0 returning an ...
  2. HSM extension in OpenSBI is implemented in a non-backward compatible manner to reduce the maintenance burden and avoid confusion. That's why, any S-mode software using OpenSBI will not be able to boot more than 1 hart if HSM extension is not supported in S-mode. Linux kernel already supports SBI v0.2 and HSM SBI extension starting from v5.7-rc1.
  3. tools.cloudbear.ru

    • Added SBI nested acceleration extension • Added common description for a virtual hart • Added SBI steal-time accounting extension • Added SBI PMU snapshot extension Version 1.0.0 • Updated the version for ratification Version 1.0-rc3 • Updated the calling convention • Fixed a typo in PMU extension • Added a abbreviation table
  4. SBI system suspend extension (Experimental) SBI PMU platform firmware events (Experimental) SBI CPPC extension (Experimental) Optimized remote TLB flushes; Simple heap for boot time memory allocations; Bring back no-map DT property for reserved memory nodes; Overall, this release mainly adds new SBI extensions along with other improvements.
  5. HSM extension in OpenSBI is implemented in a non-backward compatible manner to reduce the maintenance burden and avoid confusion. That's why, any S-mode software using OpenSBI will not be able to boot more than 1 hart if HSM extension is not supported in S-mode. Linux kernel already supports SBI v0.2 and HSM SBI extension starting from v5.7-rc1.
  6. This series adds following features to RISC-V Linux. 1. Adds support for SBI v0.2 2. A Unified calling convention implementation between 0.1 and 0.2. 3. SBI Hart state management extension (HSM) 4. Ordered booting of harts 4. CPU hotplug Dependencies: The support for SBI v0.2 and HSM extension is already available in OpenSBI master.
  7. lists.riscv.org

    Supervisor Software Events (SSE) is a new SBI extension that provides supervisor software a mechanism to register and service system events from SBI Implementation (Firmware or hypervisor). Supervisor Software ... Makefile | 2 + images/riscv-sbi-sse-sm.png | Bin 0 -> 15499 bytes riscv-sbi.adoc | 2 + src/binary-encoding.adoc | 2 + src/changelog ...
  8. Almost orthogonal to OS normal operations ie: no impact at all on normal operations Does not use regular interrupt path Avoid waiting too long due to irqs off section in kernel SSE can interrupt the supervisor mode at any place Can be seen as an NMI Allows handling of RAS fault as fast as possible to avoid fault propagation Critical to avoid taking "serious" action at a later time
  9. patchwork.kernel.org

    On Wed, Dec 06, 2023 at 12:23:16PM +0000, Conor Dooley wrote: > On Wed, Dec 06, 2023 at 12:08:09PM +0100, Andrew Jones wrote: > > When the SUSP SBI extension is present it implies that the standard > > "suspend to RAM" type is available. Wire it up to the generic > > platform suspend support, also applying the already present support > > for non-retentive CPU suspend.
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