Always private
DuckDuckGo never tracks your searches.
Learn More
You can hide this reminder in Search Settings
All regions
Argentina
Australia
Austria
Belgium (fr)
Belgium (nl)
Brazil
Bulgaria
Canada (en)
Canada (fr)
Catalonia
Chile
China
Colombia
Croatia
Czech Republic
Denmark
Estonia
Finland
France
Germany
Greece
Hong Kong
Hungary
Iceland
India (en)
Indonesia (en)
Ireland
Israel (en)
Italy
Japan
Korea
Latvia
Lithuania
Malaysia (en)
Mexico
Netherlands
New Zealand
Norway
Pakistan (en)
Peru
Philippines (en)
Poland
Portugal
Romania
Russia
Saudi Arabia
Singapore
Slovakia
Slovenia
South Africa
Spain (ca)
Spain (es)
Sweden
Switzerland (de)
Switzerland (fr)
Taiwan
Thailand (en)
Turkey
Ukraine
United Kingdom
US (English)
US (Spanish)
Vietnam (en)
Safe search: moderate
Strict
Moderate
Off
Any time
Any time
Past day
Past week
Past month
Past year
  1. guc-asic.com

    Jan 7, 2025UCIe 40G 小晶片介面提供領先業界的頻寬密度,每毫米晶片邊緣可達 1,645 GB/s。 此 IP 支援高達 40Gbps 的任何速度,並採用自適應電壓調節 (AVS) 技術來降低供電電壓,能在滿足所需速度時達到 2 倍的能源效率提升。
  2. eettaiwan.com

    Jan 7, 2025UCIe 40G 小晶片介面提供領先業界的頻寬密度,每毫米晶片邊緣可達 1,645 GB/s。 此 IP 支援高達 40Gbps 的任何速度,並採用自適應電壓調節 (AVS) 技術來降低供電電壓,能在滿足所需速度時達到 2 倍的能源效率提升。
  3. eet-china.com

    Jan 7, 2025UCIe 40G 小芯片接口提供领先业界的带宽密度,每毫米芯片边缘可达 1,645 GB/s。 此 IP 支持高达 40Gbps 的任何速度,并采用自适应电压调节 (AVS) 技术来降低供电电压,能在满足所需速度时达到 2 倍的能源效率提升。
  4. Jan 7, 2025UCIe 40G chiplet interface provides an industry-leading bandwidth density of 1,645 GB/s per mm die edge. The IP supports any speed up to 40Gbps and uses Adaptive Voltage Scaling (AVS) to reduce supply voltage achieving 2x better power efficiency for required speed.
  5. Jan 7, 2025The UCIe 40G chiplet interface provides an industry-leading bandwidth density of 1,645GBps per mm of die edge. The IP supports speeds up to 40Gbps and uses Adaptive Voltage Scaling (AVS) to reduce supply voltage, achieving 2x better power efficiency for required speed.
  6. eetindia.co.in

    The UCIe 40G chiplet interface provides an industry-leading bandwidth density of 1,645GBps per mm of die edge. The IP supports speeds up to 40Gbps and uses Adaptive Voltage Scaling (AVS) to reduce supply voltage, achieving 2x better power efficiency for required speed. The chip is assembled using TSMC's CoWoS (Chip on Wafer on Substrate) advanced packaging technology.
  7. UCIe 40G 芯片接口提供业界领先的带宽密度,每毫米芯片边缘 1,645 GB/s。 该 IP 支持高达 40Gbps 的任何速度,并使用自适应电压调节 (AVS) 来降低电源电压,从而实现所需速度的 2 倍更好的功率效率。 该芯片采用台积电的 CoWoS®(晶圆基板芯片)先进封装技术组装。
  8. 创意电子,ASIC领域领导者,近日宣布完成UCIe 40Gbps实体层IP设计定案,采用台积电N5制程,速度超越当前UCIe标准,适用于AI、HPC、xPU及网络应用。 该IP利用自适应电压调节 (AVS)技术,优化PHY供电和驱动强度,实现能源效率两倍提升,提供1,645 GB/s/mm的带宽密度。

    Can’t find what you’re looking for?

    Help us improve DuckDuckGo searches with your feedback

Custom date rangeX